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rev. 1.0 10/10 copyright ? 2010 by silicon laboratories cp2105 cp2105 s ingle -c hip usb to d ual uart b ridge single-chip usb to dual uart data transfer ?? integrated usb transceiver ; no external resistors required ?? integrated clock; no external crystal required ?? integrated 296-byte one-time programmable rom for storing customizable product information ?? on-chip power-on reset circuit ?? on-chip voltage regulator: 3.45 v output usb peripheral function controller ?? usb specification 2.0 compliant; full-speed (12 mbps) ?? usb suspend states supported via suspend pins two uart interfaces (?enhanced? and ?standard?) ?? flow control options: - hardware (cts / rts) - software (x-on / x-off) - no flow control ?? configurable i/o (1.8 v to v dd ) using v io pin ?? configurable i/o (v dd to 5 v) using external pull-up ?? all modem interface signals available (when gpio is not used) enhanced uart interface features ?? data formats supported: - data bits: 5, 6, 7, and 8 - stop bits: 1, 1.5, and 2 - parity: odd, even, mark, space, no parity ?? baud rates: 300 bps to 2.0 mbps ?? 320 byte receive and transmit buffers ?? two gpio signals for status and control ?? rs-485 mode with bus transceiver control standard uart interface features ?? data format: 8 data bits, 1 stop bit ?? parity: even, odd, no parity ?? baud rates: 2400 bps to 921600 bps ?? 288 byte receive and transmit buffers ?? three gpio signals for status and control virtual com port device drivers ?? works with existing com port pc ap plications ?? royalty-free distribution license ?? windows 7/vista/xp/server 2003/2000 ?? mac os-x ?? linux usbxpress? direct driver support ?? royalty-free distribution license ?? windows 7/vista/xp/server 2003/2000 ?? windows ce 6.0, 5.0, and 4.2 supply voltage ?? self-powered: 3.0 to 3.6 v ?? usb bus powered: 4.0 to 5.25 v ?? i/o voltage: 1.8 v to v dd package ?? rohs-compliant 24-pin qfn (4 x 4 mm) ordering part number ?? CP2105-F01-GM temperature range: ?40 to +85 c figure 1. example system diagram connect to vbus or external supply vbus d+ d- gnd usb connector logic level supply (1.8v to vdd) enhanced uart and gpio signals standard uart and gpio signals cp2105 data fifos 48 mhz oscillator 288 b rx 288 b tx 320 b rx 320 b tx enhanced uart (eci) standard uart (sci) usb interface peripheral function controller full-speed 12 mbps transceiver 296 byte prom (product customization) voltage regulator gpio / handshake control gpio / handshake control 6 rxd_eci txd_eci rxd_sci txd_sci rts_eci cts_eci gpio0_eci / dtr_eci gpio.1_eci / dsr_eci suspend / ri_eci nc / dcd_eci / vpp 6 rts_sci cts_sci gpio.1_sci / dtr_sci gpio.2_sci / dsr_sci suspend / ri_sci gpio.0_sci / dcd_sci baud rate generator eci clock sci clock regin vdd gnd vio vbus d+ d- i/o power and logic levels rst
cp2105 2 rev. 1.0
cp2105 rev. 1.0 3 t able of c ontents section page 1. system overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3. pinout and package defini tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4. qfn-24 package specificati ons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5. usb function controller and transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6. asynchronous serial data bus (uart) interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1. eci baud rate generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7. gpio mode and modem mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8. gpio pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.1. gpio.0-1?transmit and re ceive toggle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.2. gpio.1_eci?rs-485 transceiver bu s control . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 8.3. hardware flow control (rts and cts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9. one-time programmable rom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10. voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11. cp2105 device drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 11.1. virtual com port drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11.2. usbxpress drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 11.3. driver customization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11.4. driver certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 12. relevant application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 document change list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 contact information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
cp2105 4 rev. 1.0 1. system overview the cp2105 is a highly-integrated usb-to-dual-uart brid ge controller providing a simple solution for updating rs-232 designs to usb using a minimum of components and pcb space. the cp2105 includes a usb 2.0 full- speed function controller, usb transce iver, oscillator, one-time programmabl e rom, and two asynchronous serial data buses (uart) with full modem control signals in a compact 4 x 4 mm qfn-24 package (sometimes called ?mlf? or ?mlp?). the on-chip one-time programmable rom may be used to customize the usb vendor id, product id, product description string, power descriptor, device release number, interface strings, device serial number, and modem/gpio configuration as desired for oem applications. royalty-free virtual com port (vcp) device drivers provided by silicon labs allow a cp2 105-based product to appear as two com ports in pc applications. the cp 2105 uart interfaces implement all rs-232 signals including control and handshaking, so existing system fi rmware does not need to be modified. the device also features a total of five gpio signals that can be user-defined for status and control information. support for i/o interface voltages down to 1.8 v is provided via a v io pin. direct access driver su pport is also available through the silicon labs usbxpress driver set. see www.silabs.com for the latest application notes and product support information for the cp2105. an evaluation kit for the cp2105 (part number: cp2105ek) is available. it includes a cp2105-based usb-to- uart/rs-232 evaluation board, a complete set of vc p device drivers, usb and rs-232 cables, and full documentation. contact a s ilicon labs sales representativ es or go to www.silabs.com to order the cp2105 evaluation kit.
cp2105 rev. 1.0 5 2. electrical characteristics table 1. absolute maximum ratings parameter conditions min typ max units ambient temperature under bias ?55 ? 125 c storage temperature ?65 ? 150 c voltage on rst , gpio or uart pins with respect to gnd v io > 2.2 v v io < 2.2 v ?0.3 ?0.3 ? ? 5.8 v io + 3.6 v voltage on v dd or v io with respect to gnd ?0.3 ? 4.2 v maximum total current through v dd , v io , and gnd ? ? 500 ma maximum output current sunk by rst or any i/o pin ? ? 100 ma note: stresses above those listed may cause permanent damage to t he device. this is a stress rating only, and functional operation of the devices at or exceeding the conditions in th e operation listings of this sp ecification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. table 2. global dc electrical characteristics v dd = 3.0 to 3.6 v, ?40 to +85 c unless otherwise specified. parameter conditions min typ max units digital supply voltage (v dd ) 3.0 ? 3.6 v digital port i/o supply voltage (v io )1.8?v dd v supply current 1 normal operation; v reg enabled ?1718.5ma supply current 1 suspended; v reg enabled ?100220a supply current - usb pull-up 2 ?200228a specified operating temperature range ?40 ? +85 c notes: 1. if the device is connected to the usb bus, the usb pull- up current should be added to the supply current for total supply current. 2. the usb pull-up supply current values are ca lculated values based on usb specifications.
cp2105 6 rev. 1.0 table 3. uart and suspend i/o dc electrical characteristics v dd = 3.0 to 3.6 v, v io = 1.8 v to v dd , ?40 to +85 c unless otherwise specified. parameters conditions min typ max units output high voltage (v oh )i oh =?10a i oh =?3ma i oh =?10ma v io ?0.1 v io ?0.2 ? ? ? v io ?0.4 ? ? ? v output low voltage (v ol )i ol =10a i ol =8.5ma i ol =25ma ? ? ? ? ? 0.6 0.1 0.4 ? v input high voltage (v ih ) 0.7 x v io ??v input low voltage (v il )??0.6v input leakage current weak pull-up off weak pull-up on, v io = 0 v ? ? ? 25 1 50 a maximum input voltage open drain, logic high (1) ? ? 5.8 v table 4. reset electrical characteristics ?40 to +85 c unless otherwise specified. parameter conditions min typ max units rst input high voltage 0.75 x v io ??v rst input low voltage ? ? 0.6 v minimum rst low time to generate a system reset 15 ? ? s table 5. voltage regulator electrical specifications ?40 to +85 c unless otherwise specified. parameter conditions min typ max units input voltage range 3.0 ? 5.25 v output voltage output current = 1 to 100 ma* 3.3 3.45 3.6 v vbus detection input threshold 2.5 ? ? v bias current ? ? 120 a *note: the maximum regulator supply current is 100 ma. this includes the supply current of the cp2105 . table 6. gpio output specifications ?40 to +85 c unless otherwise specified. parameter conditions min typ max units rs-485 active time after stop bit ? 1 ? bit time* tx toggle rate ? 7.5 ? hz rx toggle rate ? 7.5 ? hz *note: bit-time is calculated as 1 / baud rate.
cp2105 rev. 1.0 7 3. pinout and p ackage definitions table 7. cp2105 pin definitions name pin # type description v dd 6 power in power out power supply voltage input. voltage regulator output. see section 10. v io 5 power in i/o supply voltage input. gnd 2 ground. must be tied to ground. rst 9 d i/o device reset. open-drain output of internal por or v dd monitor. an external source can initiate a system reset by dr iving this pin low for the time specified in table 4. regin 7 power in 5 v regulator input. this pin is the input to the on-chip voltage regulator. vbus 8 d in vbus sense input. this pin should be connected to the vbus signal of a usb network. d+ 3 d i/o usb d+ d? 4 d i/o usb d? suspend ri_sci 1* d out d in in gpio mode, this pin indicates whether the device is in the usb suspend or not. the polarity can be configured vi a the configuration prom, and defaults to active-low. in modem control mode, this pin is the ring indicator control input (active low) for the standard comm interface. gpio.0_sci dcd_sci 24* d i/o d in in gpio mode, this pin is a user-configur able input or output for the standard comm interface. in modem control mode, this pin is t he data carrier dete ct control input (active low) for the standard comm interface. gpio.1_sci dtr_sci 23* d i/o d out in gpio mode, this pin is a user-configur able input or output for the standard comm interface. in modem control mode, this pin is t he data terminal ready control output (active low) for the standard comm interface. gpio.2_sci dsr_sci 22* d i/o d in in gpio mode, this pin is a user-configur able input or output for the standard comm interface. in modem control mode, this pin is t he data set ready co ntrol input (active low) for the standard comm interface. txd_sci 21 d out asynchronous data output (uart transmit) for the standard comm inter- face. rxd_sci 20 d in asynchronous data input (uart receive) for the standard comm interface. rts_sci 19* d out ready to send control output (active low) for the standard comm interface. *note: pins can be left unconnected when not used.
cp2105 8 rev. 1.0 cts_sci 18* d in clear to send control input (act ive low) for the sta ndard comm interface. suspend ri_eci 17* d out d in in gpio mode, this pin indicates whether the device is in the usb suspend or not. the polarity can be configured vi a the configuration prom, and defaults to active-low. in modem control mode, this pin is the ring indicator control input (active low) for the standard comm interface. nc dcd_eci v pp 16* ? d in special in gpio mode, this pin is not used. in modem control mode, this pin is t he data carrier dete ct control input (active low) for the enhanced comm interface. additionally, in either mode programmi ng of the configuration rom via the usb interface can be accomplished if a 4.7 ? f capacitor is connected between this pin and gnd. gpio.0_eci dtr_eci 15* d i/o d out in gpio mode, this pin is a user-c onfigurable input or output for the enhanced comm interface. in modem control mode, this pin is t he data terminal ready control output (active low) for the enhanced comm interface. gpio.1_eci dsr_eci 14* d i/o d in in gpio mode, this pin is a user-c onfigurable input or output for the enhanced comm interface. in modem control mode, this pin is t he data set ready co ntrol input (active low) for the enhanced comm interface. txd_eci 13 d out asynchronous data output (uart transmit) for the enhanced comm inter- face. rxd_eci 12 d in asynchronous data input (uart receive) for the enhanced comm interface. rts_eci 11* d out ready to send control output (active low) for the enhanced comm interface. cts_eci 10* d in clear to send control input (a ctive low) for the enhanced comm interface. table 7. cp2105 pin definitions (continued) name pin # type description *note: pins can be left unconnected when not used.
cp2105 rev. 1.0 9 figure 2. qfn-24 pinout diagram (top view) 24 23 22 21 20 19 1 2 3 4 5 6 7 8 9 10 11 12 18 17 16 15 14 13 gnd (optional) cp2105-gm top view rts_sci rxd_sci txd_sci gpio.2_sci / dsr_sci gpio.1_sci / dtr_sci gpio.0_sci / dcd_sci suspend / ri_sci gnd d+ cts_eci rts_eci rxd_eci cts_sci txd_eci gpio.1_eci / dsr_eci gpio.0_eci / dtr_eci nc / dcd_eci / vpp suspend / ri_eci vdd vio d- rst vbus regin
cp2105 10 rev. 1.0 4. qfn-24 package specifications figure 3. qfn-24 package drawing table 8. qfn-24 package dimensions dimension min typ max dimension min typ max a 0.70 0.75 0.80 l 0.30 0.40 0.50 a1 0.00 0.02 0.05 l1 0.00 ? 0.15 b 0.18 0.25 0.30 aaa ? ? 0.15 d 4.00 bsc. bbb ? ? 0.10 d2 2.55 2.70 2.80 ddd ? ? 0.05 e 0.50 bsc. eee ? ? 0.08 e 4.00 bsc. z ? 0.24 ? e2 2.55 2.70 2.80 y ? 0.18 ? notes: 1. all dimensions shown are in millim eters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. this drawing conforms to jedec solid state outline mo-220, variation wggd except for custom features d2, e2, z, y, and l wh ich are toleranced per supplier designation. 4. recommended card reflow profile is per the jede c/ipc j-std-020 specific ation for small body components.
cp2105 rev. 1.0 11 figure 4. qfn-24 recommended pcb land pattern table 9. qfn-24 pcb land pattern dimensions dimension min max dimension min max c1 3.90 4.00 x2 2.70 2.80 c2 3.90 4.00 y1 0.65 0.75 e 0.50 bsc y2 2.70 2.80 x1 0.20 0.30 notes: general 1. all dimensions shown are in millim eters (mm) unless otherwise noted. 2. this land pattern design is based on the ipc-7351 guidelines. solder mask design 3. all metal pads are to be non-solder mask defined (nsmd). clearance between the solder mask and the metal pad is to be 60 ? m minimum, all the way around the pad. stencil design 4. a stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 5. the stencil thickness should be 0.125 mm (5 mils). 6. the ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads. 7. a 2x2 array of 1.10 x 1.10 mm openings on a 1.30 mm pitch should be used for the center pad. card assembly 8. a no-clean, type-3 solder paste is recommended. 9. the recommended card reflow profile is per t he jedec/ipc j-std-020 specification for small body components.
cp2105 12 rev. 1.0 5. usb function controller and transceiver the universal serial bus (usb) functi on controller in the cp2105 is a u sb 2.0 compliant full-speed device with integrated transceiver and on-chip matching and pullup re sistors. the usb function controller manages all data transfers between the usb and the uarts as well as command requests generated by the usb host controller and commands for controlling the function of the uarts and gpio pins. the usb suspend and resume states are supported for power management of both the cp2105 device as well as external circuitry. the cp2105 will en ter suspend mode when suspend sig naling is detected on the bus. on entering suspend mode, the suspend signals will be asserted if the corresponding interf ace is configured for gpio mode. suspend is also asserted after a cp2105 reset unt il device configuration during usb enumeration is complete. suspend is active-low by default, but can be configured using the prom to be active high. the cp2105 exits the suspend mode when any of the following occur: resume signaling is detected or generated, a usb reset signal is detected, or a device reset occurs. on exit of suspend mode the suspend signal is de- asserted. suspend is weakly pulled to vio in a high impedance st ate during a cp2105 reset. if this behavior is undesirable, a strong pulldown (10 k ? ) can be used to ensure suspend remains low during reset. the logic level and output mode (push-pull or open-drain) of various pins during usb suspend is configurable in the prom. see section 9 for more information. 6. asynchronous serial data bus (uart) interfaces the cp2105 contains two uart interfaces, known as the enhanced communica tions interface (eci) and standard communications interface (sci) each uart interface consists of the txd (transmit) an d rxd (receive) data signals as well as rts and cts flow control signals. optionally, the modem control signals dsr, dtr, dcd, and ri can be enabled for each interface. if modem control signals are not required for the application, these pins can be configured to operate with alternate functions, such as gpio and suspend signals. the uarts support rts/ cts, dsr/dtr, and x-on/x-off handshaking. the uarts are programmable to support a variety of data formats and baud rates. the eci supports several additional uart config uration options beyond those supported by the sci. if the virtual com port drivers are used, the data format and baud rate are set during com port configuration on the pc. if the u sbxpress drivers are used, the cp2105 is configured through the usbxpress api. the data formats and baud rates available to each interface are listed in table 10. table 10. data formats and baud rates interface enhanced communication interface (eci) s tandard communication interface (sci) data bits 1 5, 6, 7, and 8 8 stop bits 1, 1.5 2 , and 2 1 parity type none, even, odd, mark, space none, even, odd baud rate 300 bps to 2.0 mbps 3 2400, 4800, 7200, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200, 128000, 230400, 460800, 921600 notes: 1. data sizes of 5 and 6 bits are not supported at baud rates above 921600 bps. 2. 1.5 stop bits only available when using 5 data bits. 3. see ?6.1. eci baud rate generation? for more details on possible baud rates for the eci interface.
cp2105 rev. 1.0 13 6.1. eci baud rate generation the baud rate generator for the enhanced interface is very flexible, allowing the user to request any baud rate in the range from 300 bps to 2.0 mbps. if the baud rate cannot be directly gene rated from the 48 mhz oscillator, the device will choose the closest possible option. the actual baud rate is dictated by equation 1 and equation 2. equation 1. clock divider calculation equation 2. baud rate calculation most baud rates can be generated with an error of less than 1.0%. a general rule of thumb for the majority of uart applications is to limit the baud rate error on both the transmitter and the receiver to no more than 2%. the clock divider value obtained in equation 1 is rounded to the nearest integer, which may produce an error source. another error source will be the 48 mhz oscill ator, which is accurate to 0.25%. knowing the actual and requested baud rates, the total baud rate error can be found using equation 3. equation 3. baud rate error calculation the uart also supports the transmission of a line break. the length of time for a line break is programmable from 1 to 125 ms, or it can be set to transmit indefinite ly until a stop command is sent from the application. 7. gpio mode and modem mode each interface on the cp2105 can be configured in either gpio mode or modem mode. this allows the sci and eci to have either modem control signals or gpio signal s available at various pins. table 11 shows the functions that are available in each mode.by default, both interfaces are configured for gpio mode. only one mode can be selected for each interface. also , the mode of the cp2105 can only be configured once and cannot be reset to the default configuration after be ing programmed. refer to ?an223: port configuration and gpio for cp210x? for more information on how to configure the port pins of the cp2105. table 11. cp2105 modem mode and gpio mode interface pin # modem mode gpio mode standard communications interface 24 dcd_sci gpio_0_sci 23 dtr_sci gpio_1_sci 22 dsr_sci gpio_2_sci 1 ri_sci suspend _sci enhanced communications interface 15 dtr_eci gpio_0_eci 14 dsr_eci gpio_1_eci 17 ri_eci suspend _eci clock divider 48 mhz 2 prescale requested baud rate ? ? ---------------------------------------------------------------------------------------------------- = prescale 4 if requested baud rate 365 bps ? = prescale 1 if requested baud rate 365 bps ? = actual baud rate 48 mhz 2 prescale clock divider ? ? ---------------------------------------------------------------------------- - = prescale 4 if requested baud rate 365 bps ? = prescale 1 if requested baud rate 365 bps ? = baud rate error (%) 100 1 actual baud rate requested baud rate ---------------------------------------------------------- - ? ?? ?? ? 0.25% ? =
cp2105 14 rev. 1.0 8. gpio pins the cp2105 supports five user-configurable gpio pins for status and control information. the standard communication interface (sci) has three gpio pins and the enhanced communication interface (eci) has two gpio pins. to use the pins as gpio pins, the interface with the gpio pins must be configured in gpio mode. by default, both communication interfaces on the cp2105 are configured for gpio mode. if the modem control signals are needed, the interface must be configured for modem mode. see section 7 for more information on modem mode. each of these gpio pins are usable as inputs, open-drain outputs, or push-pull outputs. four of the gpio pins also have alternate functions listed in table 12 (gpio.2_sci does not have an alternate function). by default, all of the gpio pins are configured as a gpio input. the configurati on of the pins is one-time programmable for each device. the difference between an open-drain output and a push-pull output is when the gpio output is driven to logic high. a logic high, open-drai n output pulls the pin to the vio rail through an internal, pull-up resistor. a logic high, push-pull output directly conne cts the pin to the vio voltage. open-drain outputs are typically used when interfacing to logic at a higher voltage than the vio pin. these pins can be safely pulled to the higher, external voltage through an external pull-up resistor. the maximum external pull-up voltage is 5 v. the speed of reading and writing the gp io pins is subject to the timing of the usb bus. gpio pins configured as inputs or outputs are not recomm ended for real-time signalling. more information regarding the configuration and us age of these pins can be found in ?an144: cp21xx customization guide? and ?a n223: port configuration and gpio for cp210x? ava ilable on the silicon labs website. 8.1. gpio.0-1?trans mit and receive toggle gpio.0 and gpio.1 are configurable as transmit to ggle and receive toggle pins for both the enhanced communication interface and the standard communication in terface. these pins are logic high when a device is not transmitting or receiving data, and they toggle at a fix ed rate as specified in table 6 when data transfer is in progress. typically, these pins are connected to two leds to indi cate data transfer. figure 5. transmit and receive toggle typical connection diagram table 12. gpio mode alternate functions gpio pin alternate function gpio.0_eci tx toggle gpio.1_eci rx toggle/rs-485 transceiver control gpio.0_sci tx toggle gpio.1_sci rx toggle cp2105 gpio.0 ? tx toggle gpio.1 ? rx toggle vio
cp2105 rev. 1.0 15 8.2. gpio.1_eci?rs-485 transceiver bus control gpio.1_eci is configurable as an rs-485 bus transceive r control pin or the enhanced communication interface which is connected to the de and re inputs of the transceiver. when configured for rs-485 mode, the pin is asserted during uart data transmission as well as lin e break transmission and the rx toggle mode is not available. the rs-485 mode of gpio.1_eci is active-high by default, and is also configurable for active-low mode. figure 6. rs-485 transceiver typical connection diagram rs-485 transceiver r d de re cp2105 tx rx gpio.1_eci ? rs485
cp2105 16 rev. 1.0 8.3. hardware flow control (rts and cts) to utilize the functionality of the rts and cts pins of th e cp2105, the device must be configured to use hardware flow control. rts, or ready to send, is an active-low output from th e cp2105 and indicates to the external uart device that the cp2105?s uart rx fifo has not reached the watermark level of 191 bytes on the enhanced communication interface or 63 bytes on the standard communication interface and is ready to accept more data. when the amount of data in the rx fifo r eaches the watermark, the cp2105 pulls rts high to indicate to the external uart device to stop sending data. cts, or clear to send, is an active-low input to the cp21 05 and is used by the external uart device to indicate to the cp2105 when the external uart device?s rx fifo is getting full. the cp2105 w ill not send more than two bytes of data once cts is pulled high. figure 7. hardware flow control typical connection diagram cp2105 rs232 system tx rx tx rx rts cts rts cts
cp2105 rev. 1.0 17 9. one-time programmable rom the cp2105 includes an internal one-time programmable rom that may be used to customize the usb vendor id (vid), product id (pid), product description string, po wer descriptor, device releas e number, interface strings, and device serial number as desired for oem applications. if the programmable rom has not been programmed, the default configuration data shown in table 13 and table 14 is used. while customization of the usb confi guration data is optional, customizing the vid/pid combi nation is strongly recommended. a unique vid/pid combin ation will prevent the driver from conflicting with any other usb driver from a different manufacturer?s produ ct. a vendor id can be obtained fr om www.usb.org or silicon labs can provide a free pid for the oem product that can be used with the silicon labs vid. customizing the serial string for each individual device is also recommended if the oem application is one in which it is possible for multiple cp210x-based devices to be connected to the same pc. the configuration data rom can be progra mmed by silicon labs prio r to shipment with the desired configuration information. it can also be programmed in-system over the usb interface by adding a capacitor to the pcb. if the configuration rom is to be programmed in-system, a 4.7 f capacitor must be added between the nc/dcd_eci/ vpp pin and ground. no other circui try should be connect ed to nc/dcd_eci/vpp during a programming operation, and v dd must remain at 3.3 v or higher to su ccessfully write to th e configuration rom. table 13. default usb configuration data name value vendor id 10c4h product id ea70h power descriptor (attributes) 80h (bus-powered) power descriptor (max. power) 32h (100 ma) release number 0100h (release version 01.00) serial string unique 8 character asc ii string (16 characters maximum) product description string ?cp2105 usb to uart bridge controller? (47 characters maximum) eci interface string ?enhanced com port? (32 characters maximum) eci operating mode gpio mode sci interface string ?standard com port? (32 characters maximum) sci operating mode gpio mode table 14. default gpio, uart, and suspend configuration data name value gpio.0_eci/dtr_eci gpio input gpio.1_eci/dsr_eci gpio input gpio.0_sci/dcd_sci gpio input gpio.1_sci/dtr_sci gpio input gpio.2_sci/dsr_sci gpio input flush_buffers flush eci and sci tx and rx fifo on open suspend /ri_eci push-pull, active-low suspend /ri_sci push-pull, active-low rs-485 level active-high
cp2105 18 rev. 1.0 10. voltage regulator the cp2105 includes an on-chip 5 to 3.45 v voltage regulator. this allows the cp2105 to be configured as either a usb bus-powered device or a usb self-powered device. a typical connection diagram of the device in a bus- powered application using the regulator is shown in figure 8. when enabled, the voltage regulator output appears on the v dd pin and can be used to power external devices. see table 5 for the voltage regulator electrical characteristics. if it is desired to use the regulator to provide v dd in a self-powered application, the same connections from figure 8 can be used, but connect regin to an on-board 5 v supply, and disconnect it from the vbus pin. figure 8. typical bus-powered connection diagram note 3 note 2 note 1 vbus d+ d- gnd usb connector enhanced uart and gpio signals standard uart and gpio signals cp2105 rxd_eci txd_eci rxd_sci txd_sci rts_eci cts_eci gpio0_eci / dtr_eci gpio.1_eci / dsr_eci suspend / ri_eci nc / dcd_eci / vpp rts_sci cts_sci gpio.1_sci / dtr_sci gpio.2_sci / dsr_sci suspend / ri_sci gpio.0_sci / dcd_sci regin vdd gnd vio vbus d+ d- rst 1 ? f 1-5 ? f 0.1 ? f 3.45 v power vio 4.7 k note 4 note 1 : avalanche transient voltage suppression diodes compatible with full-speed usb should be added at the connector for esd protection. use littelfuse p/n sp0503baht or equivalent. note 2 : an external pull-up is not required, but can be added for noise immunity. note 3 : vio can be connected directly to vdd or to a supply as low as 1.8 v to set the i/o interface voltage. note 4 : if configuration rom is to be programmed via usb, a 4.7 ? f capacitor must be added between nc / dcd_eci / vpp and ground. during a programming operation, the pin should not be connected to other circuitry, and vdd must be at least 3.3 v.
cp2105 rev. 1.0 19 alternatively, if 3.0 to 3.6 v power is supplied to the v dd pin, the cp2105 can function as a usb self-powered device with the voltage regulator bypassed. for this co nfiguration, the regin input should be tied to v dd to bypass the voltage regulator. a typical connection diagram sho wing the device in a self-pow ered application with the regulator bypassed is shown in figure 9. the usb max power and power attributes descriptor must match the device power usage and configuration. see application note ?an144: cp21xx customization guide? for information on how to customize usb descriptors for the cp2105. figure 9. typical self-powered connection diagram (regulator bypass) note 3 note 2 note 1 vbus d+ d- gnd usb connector enhanced uart and gpio signals standard uart and gpio signals cp2105 rxd_eci txd_eci rxd_sci txd_sci rts_eci cts_eci gpio0_eci / dtr_eci gpio.1_eci / dsr_eci suspend / ri_eci nc / dcd_eci / vpp rts_sci cts_sci gpio.1_sci / dtr_sci gpio.2_sci / dsr_sci suspend / ri_sci gpio.0_sci / dcd_sci regin vdd gnd vio vbus d+ d- rst 1-5 ? f 0.1 ? f vio 4.7 k note 4 note 1 : avalanche transient voltage suppression diodes compatible with full-speed usb should be added at the connector for esd protection. use littelfuse p/n sp0503baht or equivalent. note 2 : an external pull-up is not required, but can be added for noise immunity. note 3 : vio can be connected directly to vdd or to a supply as low as 1.8 v to set the i/o interface voltage. note 4 : if configuration rom is to be programmed via usb, a 4.7 ? f capacitor must be added between nc / dcd_eci / vpp and ground. during a programming operation, the pin should not be connected to other circuitry, and vdd must be at least 3.3 v. 3.3 v power
cp2105 20 rev. 1.0 11. cp2105 device drivers there are two sets of device drivers available for cp21 05 devices: the virtual com port (vcp) drivers and the usbxpress direct ac cess drivers. only on e set of drivers is necessar y to interface with the device. the latest drivers are available at http://www.silabs.com/products/mc u/pages/softwaredownloads.aspx . 11.1. virtual com port drivers the cp2105 virtual com port (vcp) device drivers a llow a cp2105-based device to appear to the pc's application software as two com ports. application software running on the pc accesses the cp2105-based device as it would access two standard hardware com po rts. however, actual data transfer between the pc and the cp2105 device is performed over the usb interface. therefore, existing com port applications may be used to transfer data via the usb to the cp 2105-based device without modifying th e application. see application note ?an197: serial communications guide for the cp210x? fo r example code for interfacing to a cp2105 using the virtual com drivers. 11.2. usbxpress drivers the silicon labs usbxpress driv ers provide an alternate so lution for interfac ing with cp2105 de vices. no serial port protocol expertise is required. instead, a simple, high-level applicati on program interface (api) is used to provide simpler cp210x connectivity and functionalit y. the usbxpress for cp210x development kit includes windows device drivers, windows device driver installer and uninstallers, and a host inte rface function library (host api) provided in the form of a windows dynamic link lib rary (dll). the u sbxpress driver set is recommended for new products that also in clude new pc software. the usbxpress in terface is described in application note ?an169: usbxpress programmer's guide.? 11.3. driver customization in addition to customizing the device as described in "6. asynchronous serial data bus (uart) interfaces" on page 12, the drivers and the drivers installation package can be also be customized. see application note ?an220: usb driver customization? for more information on generating customized vcp and usbxpress drivers. important note : the vid/pid in the drivers must match the vid/pi d in the device for the drivers to load properly then the device is connected to the pc. 11.4. driver certification the default drivers for the cp2105 are microsoft wind ows hardware quality labs (whql) certified. the certification means that the drivers have been tested by mi crosoft and their latest op erating systems will allow the drivers to be installed without any warnings or errors. the customized drivers that are generated using the an22 0 software are not automatically certified. to become certified, they must go first throug h the microsoft driver reseller submissi on process. contact silicon labs support for assistance with this process.
cp2105 rev. 1.0 21 12. relevant ap plication notes the following application notes are applicable to the cp2105. the latest versions of these application notes and their accompanying software are available at http://www.silabs.com/products/mcu /pages/applicationnotes.aspx . ? an144: cp21xx device customization guide . this application note describes how to use the an144 software cp21xxsetids to configure the usb parameters on the cp21xx devices. ? an169: usbxpress programmer's guide . this application note describes the usbxpress ap i interface and includes example code. ? an197: serial communications guide for the cp210x . this application note describes how to use the standard windows com port function to communica te with the cp210x and includes example code. ? an220: usb driver customization. this application note describes how to use the an220 software to customize the vcp or usbxpress drivers with oem information. ? an223: port configuration and gpio for cp210x. this application note describes how to use the an223 software to configure the gpio other configurable pins.
cp2105 22 rev. 1.0 d ocument c hange l ist revision 0.1 to revision 0.5 ? updated ordering part number on page 1. ? updated electrical specific ations throughout section 2. ? added information on vpp pin in section 3. ? added section 7. ? updated section 8. ? updated section 9. revision 0.5 to revision1.0 ? removed preliminary language.
cp2105 rev. 1.0 23 n otes :
cp2105 24 rev. 1.0 c ontact i nformation silicon laboratories inc. 400 west cesar chavez austin, tx 78701 tel: 1+(512) 416-8500 fax: 1+(512) 416-9669 toll free: 1+(877) 444-3032 please visit the silicon labs technical support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. silicon laboratories, silicon labs, and usbxpre ss are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders the information in this document is believed to be accurate in a ll respects at the time of publication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and om issions, and disclaims respons ibility for any consequences resu lting from the use of information included herein. a dditionally, silicon laboratories assumes no re sponsibility for the functioning of und escribed fea- tures or parameters. silicon laboratories reserves the right to make changes without further notice. silicon laboratories makes no warranty, representation or guarantee regarding the suitability of its pr oducts for any particular purpose, nor does silicon laboratories assume any liability arising out of the application or use of any product or circuit, and specif ically disclaims any and all liability, in cluding without limitation consequential or incidental damages. silicon laboratories products are not designed, intended, or authorized for use in applica tions intend- ed to support or sustain life, or for any other application in which the failure of the silicon laboratories product could crea te a situation where personal injury or death may occur. should buyer purchase or us e silicon laboratories products for any such unintended or unaut horized application, buyer sha ll indemnify and hold silicon laboratories harmless against all claims and damages.

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